CSCE 211: Digital Logic Design (Spring 2009)

Please keep all your graded materials until grades are posted.

Prerequisites: MATH 141

Meeting time and venue: MWF 1010-1100 in SWGN 2A22

Instructor: Marco Valtorta
Office: Swaeringen 3A55, 777-4641
E-mail: mgv@cse.sc.edu
Office Hours: TTh 1030-1200. Please check by phone or email. Others by appointment.

Required materials:

Charles H. Roth, Jr. Fundamentals of Logic Design, 5th edition. Brooks/Cole and Thompson, 2006, ISBN: 0534378048, ISBN13: 9780534378042 (required text) Supplementary materials from the publisher, including an errata list, are available.

Circuit Kits will be provided at no cost.

current departmental syllabus for CSCE 211, and the

main web page for Professor Larry Stephens's offering of this course. It is my intention that lectures in the two sections of the course will cover the same material on the same day, that the same homework will be assigned, and that the same procedures will be followed.

Specific objectives of this course:

• Represent numbers and perform arithmetic in bases 2, 8, 10, and 16
• Encode symbols and numbers in binary codes
• Add and subtract using 2's complement code
• Evaluate and simplify logical functions using Boolean algebra
• Represent logical functions in Canonical form and with AND, OR, NOT, XOR, NAND, NOR logic gates
• Analyze and design combinatorial circuits
• Simplify combinatorial circuits into SOP and POS form using Karnaugh maps
• Implement functions with NAND-NAND and NOR-NOR logic
• Analyze and design modular combinatorial logic circuits containing decoders, multiplexers, demultiplexers, 7-segments display decoders and adders
• Use the concepts of state and state transition for analysis and design of sequential circuits
• Use the functionality of D, J-K, and T flip-flops for analysis and design of sequential circuits

Course outline with topics keyed to texbook chapters:

• Chapter 1. Introduction
• Chapter 1. Number Systems and Codes Conversion table
• Chapters 2 and 3. Algebraic Methods
• Chapter 4. Standard Representations: Min-terms and Max-terms
• Chapter 5. Simplification Methods (Karnaugh Maps)
  • Guidelines for Simplification
  • Four-Variable K-map Template
• Chapter 9. Modular Devices
• Chapter 11. Latches and Flip-Flops
• Chapter 13 and 16. Analysis and Design of Sequential Circuits
• Circuit assignments (4) will be made during the semester
• The last day to withdraw without failure is Monday, February 23, 2009. The final exam for the course will take place on Thursday, April 30, 2009, at 9am in the classroom (SWGR 2A22). This is the regularly scheduled time for courses taught from 1:25pm to 2:15pm on Tuesdays and Thursdays.

Grading:

• Test 1: 37.5% (50 minutes) (updated from 25%)
• Test 2: 12.5% (50 minutes) (updated from: 12.5%)
• Final Exam: 30% (2 hours)
• Homework: 10%
• Circuits: 10%
• Quizzes or in-class exercises: 5% extra credit (updated from no credit)

• They come to class regularly.
• They come to class on time.
• They do the homework, and they do it with pride and care, so that it is easy to grade.

Tests:

• Test 1 will be on Monday, February 16, one week before the last date to withdraw with a grade of W instead of WF. Test conditions: Closed book, No notes, No calculators, Hex binary 0000 to 1111 provided, Page 52 of text included (Boolean algebra formulas), 50 minute time limit (late arrivals will be given up to 10 minutes of extra time).

Homework Instructions

• Homework is due at the beginning of the class for which it is assigned.
• Late homework will not be accepted.
• Please show all steps of your work; otherwise, you will not receive any credit.
• Please staple your signed homework coversheet to each problem set. Consider purchasing a mini-stapler, such as this one.
• Unstapled homework will not be accepted.
• Please only use one side of straight-edge paper. Problems submitted on ragged (tear-out) spiral note paper will not be accepted.
• Please be neat and legible.
• Clearly identify problem number (and text exercise number when appropriate).
• The coversheet includes a statement based on the University of South Carolina Honor Code.

Homework with Due Dates

• Homework 1 due January 26, 2009 (Monday)
• Homework 2 due February 6, 2009 (Friday)
• Homework 3 due February 13, 2009 (Friday)
• Homework 4 due March 20, 2009 (Friday)
• Homework 5 due April 10, 2009 (Friday)
• Homework 6 due April 27, 2009 (Monday); do only exercises 1 and 3; do not do exercises 2 and 4.

Circuit Instructions

• PLEASE ATTEND CLASS TO GET YOUR KIT. ROLL WILL BE TAKEN.
• The "check-off" procedure is that you bring your completed circuit to class on the check-off day.
• Also, for "check-off" bring your written, circuit report with stapled, signed circuit cover-sheet.
• The report *must* be neatly drawn with the template provided in the circuit kit or with a drawing program (Visio, or whatever you want).
• YOUR REPORT MUST ACCOMPANY YOUR CIRCUIT FOR CHECK-OFF
• ALL CIRCUITS MUST BE COMPLETED TO GET A PASSING GRADE IN THE COURSE.
• Students enjoy the circuits, which are easy and fun to build!

Circuit Lecture and Due Dates Instructions

• Circuit 1 due Wednesday, March 4.
• Circuit 2 due Monday, March 30.
• Circuit 3 due Wednesday, April 22.