COLLOQUIUM
Department of Computer Science and Engineering
University of South Carolina
 
Lightweight Hierarchical Error Control Codes for Multi-Bit
Differential Channels Jason D. Bakos

Department of Computer Science 
University of Pittsburgh

Date: March 18, 2005
Time: 3:30-4:30PM
Place: Swearingen 1A03 (Faculty Lounge)

Abstract

High-speed electrical signaling is an increasingly important research
area for inter-chip and network-on-chip system interconnects.  This
work is motivated by factors such as the gap between on-chip versus
off-chip transmission rates caused by capacitive effects, as well as
industry trends toward high-speed serialized channels for conservation
of chip resources.

Data encoding techniques that are tightly integrated with the chip I/O
architecture act to alleviate loss of signal integrity and allow for
higher off-chip transmission rates.  New error control codes, called
“Lightweight Hierarchical Error Control Codes,” use a technique
for adding additional signal integrity to off-chip channels that is
based a new type of high-performance signaling technology called
Multi-Bit Differential Signaling.  Lightweight Hierarchical Error
Control Codes take advantage of inherent properties of the underlying
signaling technology to add channel error control while requiring low
information, logic, and memory overhead.  Encoding and decoding may be
performed with as few as 400 logic gates and in some cases require
zero information overhead.

To characterize the effectiveness of this encoding technique,
driver/receiver and transmission line models are simulated against
modeled noise and other error sources.  Symbol error rate is then
computed as a function of transmission rate.  Using this method,
off-chip links utilizing this new error control code are shown to have
significantly higher noise immunity than those without, achieving up
to four orders of magnitude less error rate and allowing for up to a
25-30% increase in maximum attainable transmission speed.

Jason D. Bakos is currently completing his Ph.D. at the Department of
Computer Science at the University of Pittsburgh.  He has extensive
experience in the design and modeling of high-performance VLSI
integrated circuits and systems.  His work in optoelectronic and
electrical signaling technology has received design competition awards
at the annual ACM Design Automation Conference in 2002 and 2004, as
well as a departmental research award in 2004. Jason is a member of
the IEEE, ACM, and OSA.